Semiconductor-on-insulator (SOI) technology is becoming increasingly important in semiconductor processing. A SOI substrate structure typically contains a buried insulator layer, which functions to electrically isolate a top semiconductor layer from a bottom semiconductor substrate. Active devices, such as transistors, are typically formed in the top semiconductor layer of the SOI substrate.
Devices formed using SOI technology (i.e., SOI devices) offer many advantages over their bulk counterparts, including, but not limited to: reduction of junction leakage, reduction of junction capacitance, reduction of short channel effects, better device performance, higher packing density, and lower voltage requirements.
However, a charge can build up in the body of the SOI devices, which in turn leads to undesirable floating body effects that adversely impact the device performance. Further, as the SOI devices are scaled down, the contact resistance in the SOI devices is significantly increased. In order to reduce the contact resistance, raised source and/or drain structures are typically employed in ultra-thin SOI devices, which increases the manufacturing costs as well as the defect density of the SOI devices.
There is therefore a need for improved SOI substrates and SOI devices with reduced floating body effects and reduced contact resistance. There is also a need for a simple and effective method of fabricating the improved SOI substrates and SOI devices at reduced costs with fewer defects.